Bruce Rafey Associates

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Process Integration Engineer

Contribute to the development and transfer to manufacturing of key new fabrication processes while working with the Company's contract foundry's engineering and operations staff as well as vendors of new equipment and materials. The primary responsibility will be the process development for a Phase Change Memory integrating the key technologies (processes and materials) of the company product. This individual will have the responsibility for identifying and implementing critical enabling technologies necessary for the successful development and transfer to manufacturing of a phase change memory device. Interaction with Semi equipment manufacturers and suppliers of proprietary thin film materials will also be required. The successful candidate will have the ability to identify and mitigate high risk areas of development, identify root causes and then develop and implement solutions. BS, MS, or Ph.D. in electrical engineering, materials science, physics, chemical engineering, chemistry, or related physical or engineering science. 5+ years experience in key module process development in semiconductor fabrication environment. Demonstrated experience in thin film deposition of GST materials is highly desired. Knowledge of design of experiments (DOE), statistical process control (SPC) and statistical software a plus. Should have experience with AFM, SEM, and other analytical characterization tools.

Location: Boston Area
Salary: 100 - 120K

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Validation Engineer

You will verify the functional "correctness" of Itanium® and/or Xeon® processors. Your responsibilities will include but not be limited to: Ensuring the logical design of a microprocessor satisfies the architectural specification; Creating and optimizing the validation environment, tools and methodologies; Developing or using checking software to compare model behavior against a specification; Generating focused and random test cases, analyzing coverage and debugging failure cases; Writing software to provide controllability and observability into the architectural model; Analyzing microarchitectural features to identify possible problem areas. Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or Computer Science, with at least three years of relevant work experience. Previous experience in pre-silicon or post-silicon validation and/or verification; Strong background in computer architecture; Programming experience in C++, Perl and Assembly; Familiarity with hardware description languages; Understanding of object oriented programming, data structures, algorithms and digital logic. Solid understanding of system and processor architecture, and the interaction of computer hardware with software.

Location: Massachusetts

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Senior Staff Design Engineer

Lead Analog Clock Generation space for High-Performance Microprocessor designs. Responsibilities include architecture, technology pathfinding, specification, IC circuit design, layout supervision, documentation, DFT and DFM of analog and mixed signal clock generation units, leading and mentoring of team members and active collaboration with colleagues and partners across the company. Minimal travel may be required. Analog clock design responsibilities may consist but not limited to high performance, low-jitter PLLs, on-die voltage regulators and references, high performance clock distribution networks, DLLs, custom power supply networks and other elements necessary to design, verify and productize high performance analog and mixed signal IO and Clocking solution. Bachelor of Science degree in Electrical Engineering or higher with more than eight years of general IC analog and/or mixed-signal design experience, preferably in high performance, low-jitter PLL space including at least three years of experience leading and/or managing design team and mentoring junior engineers. Ability to work independently, lead the team and provide mentorship and guidance to more junior engineers.

Location: Massachusetts

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RTL Design Engineer

Participate in the development of High Performance Microprocessors. In this position, you will be responsible for taking the RTL design through the physical design flow including (Synthesis, placement, routing, clock tree synthesis, scan insertion, timing convergence and noise analysis). Bachelor of Science degree in Electrical Engineering or Computer Engineering (a Master's degree is preferred) with four to eight years of relevant physical design experience with complex System on a Chip (SOC) devices. Direct Microprocessor Architecture knowledge. Direct experience with Synopsis and/or Cadence based tools (DC, PC, ICC, Primetime, Primetime SI, Astro, and others). Delivered one or more chips through the Physical Design flow to Tape-in. Working Knowledge of System Verilog*, RTL design, DFX methodology (Scan, BIST)

Location: Massachusetts

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Senior Design Engineer

Responsible for delivering RLS blocks on Intel Multi-Core High-Performance Microprocessor designs. Flow development work includes logic synthesis, correlation, CTS, placement and routing, and timing. Design work includes complete delivery of RLS blocks including all design convergence activities (timing, area, power, RV, noise, ERC and SER). Interact with peers and/or management across the project sites and within the IPF and/or EMG organization. Participate in definition of the RLS flow and pilot activities. Bachelor of Science degree in Electrical Engineering or Computer Engineering (a Master's degree is preferred) with eight to twelve years of relevant physical design experience in areas such as Very Large Scale Integration (VLSI) Design Lifecycle from RTL through Implementation of RLS flow based Chip or Block level design. Strong implementation skills using Synopsys {DC (Synthesis), ICC or PC/Astro (Place and Route)} and Intel ('Tango' timing analysis), Parade (or equivalent Floorplanning), Noise, RV, Willow (or equivalent Scan Insertion), and others) tools. Working Knowledge of System Verilog*, RTL design, DFX methodology (Scan, BIST, SROSL and others) and SER Analysis.

Location: Massachusetts

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Senior Manufacturing / Process Engineer

Experience developing and sustaining manufacturing processes for microelectronics component and Hybrid products. The individual in this role must have expertise in prototyping, manufacturing process development, precision assembly and volume manufacturing. Support operations including frequency tuning and automated assembly and packaging equipment. Develops, evaluates, and improves manufacturing methods, processes and procedures. Analyzes manufacturing space requirement, workflow, workspace and designs facility and equipment layout for maximum efficiency. Researches and purchases automated process equipment utilizing cost justification techniques. Designs tooling and fixturing to support production. Develops Drawings, visual aides and manufacturing documentation. Works with vendors to qualify, materials and evaluates products according to specifications and quality standards. Performs failure mode analysis and implements corrective action. Works with R&D engineering to transition new products to manufacturing. BS in engineering / science and 5-10 years experience in microelectronics components / hybrid manufacturing is required. Solid knowledge of data analysis techniques, Six Sigma methodology, process capability analysis, DOE, PFMEA and SPC is required. Experience in frequency generation component (BAW / SAW oscillators) manufacturing including epoxy attach, wire bond and hermetic packaging is desired.

Location: New England
Salary: 90 - 110K

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BAW Crystal Process & Equipment Engineer

BS Engineering or Engineering Technology with minimum 5 years experience.
In depth knowledge of crystal / semiconductor processing such as cleaning, wet & dry etching, and metal deposition; strong process troubleshooting and problem solving skills; demonstrated application of Statistical Process Control and Data Analysis Techniques; and demonstrated interpersonal/ communication and teamwork skills. The BAW Crystal Process & Equipment Engineer is responsible for providing support for the Bulk Acoustic Wave (BAW) crystal process. Essential duties and responsibilities include, but are not limited to: Provide engineering support for BAW crystal process (processes include but are not limited to crystal cleaning, etching, testing, and metal deposition); Sustain existing manufacturing process and identify and execute improvement projects; Serve as equipment engineer to design and build custom process equipment for automated processing of BAW crystals; Support and improve production equipment as well as the development of new process equipment as needed including mechanical design work, instrumentation and controls, and programming.

Location: New England
Salary: 90 - 110K

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Sensor Process Engineer

BS Engineering or Engineering Technology with minimum 5 years experience.
Extensive experience with high performance electronics and sensor manufacturing including process development, process fixture design, potting, casting, encapsulation, wire bond, mechanical bonding (i.e. adhesives and welding), PCB assembly, instrumentation and test. Responsible for improving existing processes nd defining/developing new processes for the manufacture of fluid, physical and gas sensor products. The engineer will work with senior sensor designers to understand the design requirements and to jointly develop manufacturing processes, tooling and documentation. The engineer will also train and oversee assembly technicians and will be responsible for the pilot pre-production activities. Finally the engineer will be part of the product transfer team to coordinate any process related activities to operations.

Location: New England

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Analog Design Engineer

Directly involved in all stages of development including product definition, design, simuation, layout, charagerization, validation and transition to production. Emphasis will be on design of DC-DC converters utilizing CMOS technologies. Responsibilities include top level architecture design, complex analog circuit design including data converters/bandgap references/linear regulations/DC-DC converters/padring design, top level circuit modeling/simulation/verification, design reviews/technical presentations. BSEE with 7+ years of experience in CMOS analog and mixed mode IC design. Must possess a good understanding of device physics and processing. DC-DC converter modeling and design experience.

Location: Arizona

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Senior Analog Designer

Responsible for analog circuits including DACs and ADCs, high speed or precision amplifiers, or power converters. Examples of RF circuits include mixers, high frequency amplifiers, PAs, LNAs, TIAs, clock recovery circuits or frequency synthesizers.

Location: Massachusetts

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Product Engineer

Responsible for transitioning the prototype design of company's proprietary low cost diode memory devices into volume production. Will perform test and evaluation of die and packaged parts to verify product integrity and coordinate transfer of data into product specifications. Will design test fixtures for bench level or ATE as necessary. Additional Functions: generation of production documentation associated with new products, data anslysis, certification of test hardware and software for production, maintain all product documentation with manufacturing, responsible for cost reduction through yield and manufacturing improvements.
BSEE, MEEE (or equivalent) with 5+ years experience in memory chip characterization. Prior product engineering experience in Flash Memory.

Location: Massachusetts

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Process Engineer - Photolithography

Will work closely with process Development Engineering Group. Primary responsibility will be in implementation and integration of key technologies (processes and materials) focused on the company process. Individual will be focused on the process development and commercialization for novel and disruptive solid state memory devices. Must have the ability to identify and mitigate high risk areas of fabrication process flow, identify root causes and development and implement solutions.
BS/MS in Electrical Engineering, Materials Science, Physics, Chemical Engineering, Chemistry or related engineering science. 3+ years of demonstrated industry experience in photolithography. Hands on experience with expoure tools, SEM, overlay and other analytical characterization tools. 3+ years experience in key module process development. Hands on experience using ASM scanner and Applied Materials CD SEM preferred. Knowledge of DOE, SPC and statistical software a plus. Experience with modern 90nm to 45nm and 300mm commercial grade wafer process tools a plus. Knowledge of process integration for MOS or CMOS FETs.

Location: California Bay Area

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Memory Logic Design Engineer

Responsible for managing the design of a family of controller chips which will interface to proprietary low cost diode memory array and achieve compatibility with industry standard removable memory cards and other system interfaces. The ideal candidate for this position will have an advanced understanding of the following technical areas: Knowledge and experience in the logic design of Flash memory, including charge pumps. Knowledge of industry standard solid state removable media characteristics and specifications such as SD, MMC and other card formats. Error correction techniques and design. Creating memory array architectures and specific implementation methods to allow memory array device designs to work efficiently with standard memory controller implementations. Design, debug, and characterization of memory systems necessary to validate and qualify memory device functionality with potential for transfer to production. BS or MS, in electrical engineering CIS, or related fields. 8 to 10 years experience in memory chip design, characterization, and qualification.

Location: Boston Preferred (Possibly California)

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Senior Product Engineer

Development and support of New Products for the Energy Metering Product Line. Responsibilities will include characterization, qualification, and release of new product to manufacturing. Other responsibilities will include sustaining activities for existing products such as Failure Analysis and Yield Enhancement. Candidate will interface with design, test development, applications, marketing and manufacturing to support these activities.
BSEE or MSEE plus 5 years analog or mixed signal semiconductor experience in a product engineering role which must include experience with lab testing. Automatic Test Equipment a plus.

Location: Massachusetts

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Marketing Manager

Manage and lead marketing and applications engineering organization in fast growing product line. Define and manage marketing strategies and develop strategic relationships with key customers in target markets. Lead product definition activities. Identify and assess new market opportunities. Work and sales and application engineers to drive and secure customer design-ins and design-wins. Provide training materials for sales/distribution personnel and execute sales and FAE training. Support strategic planning activities, including annual business planning process. Develop and maintain CRM systems to identify new opportunities and trends. Collaborate with other marketing groups to provide product promotion at key customer accounts and in key market segments.
Minimum BSEE or equivalent. 10 years marketing experience or related field. 5 years experience working with customers.

Location: Massachusetts

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Wet Etch Equipment Specialist

This position involves the preventative and corrective maintenance of the tool sets found in the Diffusion/CVD/Wet Etch area. Wet Etch Tool set includes, Akrion Gama, SEZ 201, JST, FSI Mercury, FSI/BOC BCDS and Fortrend wafer transfer systems. Responsible for monitoring Equipment in the area and be familiar with issues; Performing routine PMs and Maintenance as required; Creating/Modifying Procedures and PM specifications as needed to improve tool availability or enhance training of other technicians; Ordering consumable and non-consumable parts for tools as assigned; Trouble shooting minor and complex tool issues to resolution; Using SPC to trouble shoot issues or determine the health of tools in the area. Minimum of an AS degree in Electronics. A minimum of 10 years experience in a semiconductor-manufacturing environment with a minimum of 5 years technical experience in repair and preventative maintenance on Wet Bench technology preferably Akrion Tools. Must posses excellent communication skills, which includes verbal and written. Must be proficient in MS office products and various OS platforms. Must understand the concept of consumable and non-consumable parts costs associated with the job and look for ways to reduce costs without affected tool or product performance. Must have a basic knowledge of SPC and how it is used in the manufacturing environment. Position requires routine replacement of Acid and Solvent drums on the Bulk Chemical Distribution System.

Location: Texas
Salary: 40 - 70K

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Section Head

Manage a small group of engineers in specific disciplines (Photo, Metals/Diffusion/Implant and Grind/Polish/Etch). Specific requirements include; At least 10 years semiconductor or MEMS experience in a manufacturing environment. Minimum of a BS in engineering or physics discipline. MS preferred but not required. Manage small group of engineers by driving continuous improvement initiatives, prioritizing projects, helping to manage timelines, driving data driven mentality and helping to introduce the utilization of new technique to improve processing. Strong analytical and problem solving skills. Strong organizational and multi-tasking skills. Ability to drive projects (or direct others to drive projects) from beginning (idea generation) to end (full implementation). Able to work around any potential roadblocks that arrive. Focuses on bringing forth proposed solutions to problems to management (not just problem statements). Capable of organizing and running an effective meeting.

Location: Massachusetts

The Layout and CAD Manager will be responsible for the development and supervision of all layout and CAD related activities for RF and high performance analog ICs. Manage a team of layout and CAD engineers and contractors to support a world class RF and high performance analog development organization. In managing this team, the principle tasks are: Hiring; Continuously coaching and training; Leading. Define, implement, manage, and continually refine our EDA environment, tools, design libraries and methodology. Working with the vice president of engineering, the CTO, the vice president of operations, project leaders, vendors, and contractors, ensure that our EDA environment, tools, design libraries and methodology meet current and future business needs. The principle tasks in running the EDA environment are: Develop and implement initiatives for continuous improvement in design productivity and quality, including simulation, verification and layout. Work with foundries to develop a seamless integration between Star's development process and the foundry prototype manufacturing processes. Manage computing infrastructure to insure proficient design environment. Running the day to day operations of the Layout and CAD Department, the principle tasks are: Participate in design planning process, develop schedules and determine resource requirements for IC layout and verification. Supervision of the work and information flows into and out of the CAD and Layout groups- with the development teams, the layout teams and tool providers. Hands on experience with IC layout and verification for analog ICs using Si BJT and/or CMOS technologies; Experience leading IC layouts from beginning through tape-out to foundry. Familiarity with analog design and layout tools, including the Agilent and Cadence tool suites; Experience working with external foundries; Experience understanding and installing technology files, writing scripts, and managing an IC database in a Linux environment. More than 10 years of relevant industry experience including at least three building and managing teams consisting of employees and contractors is required. BSEE required with MS or other advanced degree preferred.

Experience in either GaAs, silicon or GaN. Candidate will be a hands on process engineer with 2-10 years relevant experience in main aspects of semiconductor processing. Process specialization is required in the areas of either post fab (dicing / grinding) or metallization deposition systems and operations. The candidate should have a BS in electrical, chemical engineering or physics, with an emphasis on materials engineering. In addition, the candidate must show examples of statistical analysis work completed and an ability to work well in a team oriented environment. Relevant publications and/or patents are a plus.

Responsible for extraction of linear and non-linear models on various types of devices including MESFETs, PHEMTs, HBTs, and passive structures such as plastic packages. Responsibilities will also include development of new models, characterization and modeling of new technologies such as GaN PHEMTs and high-voltage GaAs PHEMT and HBT devices, and development of design kits for distribution of models to the design teams. The position requires some amount of programming and code development for work with design kits, characterization and test software maintenance, and creation of model extraction algorithms, so a working knowledge of C/C++ is highly desirable, but this is not a 'programming' job. Knowledge of semiconductor physics; Knowledge of electromagnetics; Master's degree preferred, but not required.

Responsible for developing unit processes used to create the company's fuel cell MEMS structures, although some sustaining work will be required. Develop MEMS manufacturing processes as required in the areas of photolithography, etch, thin films, wafer bond and metrology. Transfer processes to production and provide any required training. Write specifications and instructions for the processes developed. Work with a team of engineers, technicians, and operators to meet development goals. Manage equipment evaluations, qualifications and installations. Design, execute and analyze experiments. Present data, analysis and recommendations both orally and in writing. Assist with sustaining processes, yield improvement tasks, and equipment support as required. Minimum Bachelor's degree in engineering or science. Master's preferred. At least 5 years of MEMS/semiconductor process engineering experience, 10 or more years preferred. Minimum 4 years experience in MEMS process engineering. Minimum 2 years conducting development work. An expert in process design and integration for manufacturing preferred. Minimum 2 years experience in photolithography. UltraTech stepper and EVG/Suss aligner experience preferred. Experience developing resist coat processes for MEMS devices with non planar topography preferred. Prefer at least 1 year experience with deep reactive ion etching and 2 years experience with standard dry and wet etching. Experience with wafer bonding, plating, ion beam processes, and thin film deposition highly desired but not required. Familiar with DOE, SPC, Gage R&R, and statistical analysis.

Assist the Product and Test Engineering Groups with packaging and testing of the company's Read/Write and One Time Programmable memory products. This individual will be responsible for the design, construction, and troubleshooting / debug, of test fixtures in support of product and test engineering. Familiar with Automated Test Equipment programming and methodologies. Also be responsible for bench level functional and parametric characterization testing. Construction of breadboard fixtures to support the design analysis, development and revision of existing and new products. Perform various product tests and write test reports. Analysis of product electrical performance data using appropriate test equipment, schematics, program diagnostics and associated documentation. Assist with the development of printed circuit boards and integrated circuits using CAD software packages. Associates Degree in Electronics or two year certificate. 4 to 8 years related work experience in the electronics field. Must have basic knowledge of analog and digital electronics theory. Excellent troubleshooting skills. Knowledge of test equipment and operation of lab equipment including power supplies, oscilloscopes, multimeters, curve tracers, semiconductor analyzers, frequency counters, function generators, and soldering stations. Hands on knowledge of computer applications including Windows, Excel, and MS Word.

Company develops a MEMS based fuel cell to provide portable power for cellular telephones, notebook computers and other small form factor electronic devices.
Equipment Engineers are responsible for troubleshooting, repairing, and maintaining the company's MEMS processing equipment. Troubleshoot, repair, and maintain photolithography equipment such as UT Steppers, EVG Aligners, EVG coater/developer and other Semiconductor/MEMS process equipment down to a component level. Capabilities must include electronic and mechanical troubleshooting. Develop preventive maintenance procedures and spare parts programs for equipment including tracking equipment up-time, analyzing data and developing up-time improvement programs. Modify equipment to make the equipment better suited to the company's requirements. Interface with equipment and parts suppliers to obtain spare parts and technical information as required to keep the company's photolithography equipment running. Technical degree or equivalent experience. A minimum of 5 years of experience in semiconductor and or MEMS process equipment maintenance specifically related to photolithography and Ultratech stepper equipment. Personal computer skills including Microsoft Word, Excel and PowerPoint. Proficiency in technical report writing.

Manage and support the quality functions of various microwave component devices. Perform internal audits, maintain and enhance ISO 9001:2000 and AS 9100 quality and generate failure analysis reports, support and supervise inspection personnel. Work closely with the materials planners, buyers and quality engineers to identify supplier and internal quality requirements and objectives. Support customers with audit functions, generate quality plans. Support customer on-site inspections and review and approve applicable documentation associated.
BS in Engineering or equivalent and 5 years of applicable experience.

Support memory product design through improvements in device performance, dielectric reliability, and metallization electrical parameters. As a senior device engineer you will: Develop, implement, and characterize electrical and process test structures. Develop device simulation models to predict device behavior and correlate simulations to experimental data. Interact closely with circuit design teams to understand device parametric requirements and with process development teams on process issues and next generation device technology. Perform and/or direct electrical and reliability characterizations. MS/PhD in electrical engineering or physics; 3+ years of industry experience in semiconductor IC device physics, reliability, device modeling, characterization, and analysis. Hands on proficiency with electrical measurement and device simulation tools (e.g. Medici, Dessis, Sentaurus, etc.).

Prepare drawings and schematics of semiconductor memory devices. The primary responsibility will be creating drawings, layouts and schematics through communications with design engineers and utilizing automated design tools. Identify and verify specifications by examining engineering documents; performing calculations. AutoCAD, CAD, Drafting, Drafting Tools, EDA Tools (Cadence). BS mechanical engineering or equivalent technical experience. 5+ years experience in schematic layout and capture. Experience with modern Cadence EDA tools.

Responsible for electronic/mechanical repair and maintenance of semiconductor related manufacturing equipment. Primary focus will be the repair/maintenance of Wafer Fab production equipment. This will include aligners, wafer track systems, metal deposition equipment, diffusion furnaces, dicing equipment and other general duties. Will also have responsibility to repair/maintain electronic test equipment, burn-in systems and various production assembly equipment as needed. Will maintain accurate equipment records for all equipment maintenance performed. Perform scheduled preventive maintenance. Must have Associates degree in electronic theory or equivalent such as technical school or military training along with a minimum of four years of directly related experience in repair/maintenance of Wafer Fab production equipment. Must be able to interpret and work from electronic schematics, mechanical prints.

Provide process engineering expertise to support customer product demonstrations. Responsible for designing and conducting experiments to develop doping/implant processes for advanced semiconductor processing. Responsible for making presentations to customer as well as at national and international conferences. Participate in R&D work in developing new ion implanters.
Requires advanced degree (MS / PhD) in Material Sciences / Electrical Engineering / Chemical Engineering or Physics.
Requires 5 - 7 years experience in Semiconductor processing.

Organize and perform a variety of verification and quality assurance tests for personal identification systems incorporating state of the art fingerprint sensors. Responsible for organizing tests and test subjects, configuring test systems, compiling test checklists, performing the detailed tests, documenting the results and managing the test data. Will also verify the product performance specifications and assist in the continuing improvement of product quality. BSEE or Computer Science Degree; Experience in the development and application of software/system test methodologies. Must possess good technical understanding of Microsoft Windows Personal Computers including the various operating systems, file structures, application interaction and use on a Microsoft Windows network. At least one year of relevant experience in a product quality testing related role is required.

Lead effort in the design and development of a new generation of semiconductor IC packaging for advanced finger print sensors. Focus will be on the development of custom substrates and coating materials. Provide direction to the chip designers in the development stage, along with marketing personnel, to design an optimum cost effective, robust and aesthetically pleasing semiconductor package. BS/MS with 5 years experience. Strong working knowledge of substrate design is required. Experience in material section, thermal and electrical properties of IC packages.

Responsible to define and implement a robust sales and operations planning process and organization (S&OP) for a regional business with several production locations across Americas. Central control of supply and demand information with regular performance monitoring to ensure continuous improvements on overall customer delivery performance. Alignment of financial and supply chain forecast, as well overall customer forecast accuracy measurements. Work with customers to develop best alternatives. Provide customers with lead-times for standard and non-standard products. Review monthly inventory liability for make-to-stock and make-to-order items. Usage of S&OP process as an internal integration process for global tactical planning, joint forecasting and planning between suppliers and customers. Assists Operations in resolving capacity/manufacturing issues for critical products. Regular reviews of delivery scorecard to identify and fix route causes for late deliveries.
B.S. Degree. Working knowledge of SAP ERP, MRP, MPS, customer demand flows, supplier schedule agreements and Microsoft office tools. Effective mathematical skills. +5 years of senior forecast and planning management experience in supply chain. Excellent inter-personal and communication skills are essential.
Fluent English, Spanish.

Responsible, as part of a team, for the design, development and implementation of high performance, integrated microwave assemblies for commercial and military applications. The successful candidate will have knowledge in the design and implementation of RF/Microwave/Millimeter wave circuits. The candidate must be comfortable with component level circuit design (NF, Gain, IIP3), system level performance specifications, microwave board design and issues encountered in the design/implementation of high integrated function assemblies. M.S.E.E. or PhD in EE with experience in the design of RF/Microwave/Millimeter wave circuits. Good understanding of fundamental RF and Microwave circuit design principals; good understanding of analog circuit design principals; experience in EDA tools (specifically ADS and Cadence Environmental); experience in full wave modeling of passive printed circuits using 3-D electromagnetic simulators (Sonnet em and Ansoft HFSS).

Design high speed analog circuits that must operate in a truly mixed signal environment. Experience with ADC, DAC and or PLL designs. Candidate should have working experience with CMOS or BiCMOS. Must be able to lead design teams and work well in team environment. Experience with high speed serial communications systems or video systems a plus. BSEE MSEE preferred with 5+ years experience.

Candidate will possess a MSEE with 6 years experience. Familiar with SiGe, SiGe BiCMOS or CMOS technology. Background in RF and microwave circuit design advantageous. Ability to find innovative solutions to problems and translate them into practical solutions; ability to follow a product specification through from concept to design, layout, prototyping, test and production. Familiar with either Cadence (Spectre) or Agilent ADS (preferably both) along with at least one of the mainstream commercial electromagnetic analysis engines desired.

This position will be responsible for the architecting, transistor-level and cell level design and simulation, debug, and validation of analog and digital signal processing circuits for MEMS based sensors, in particular non-inertial sensors employing existing or emerging MEMS process technologies. The role will involve coordination with design and product groups across the corporation in the interest of reusing existing designs and/or optimizing interface to existing signal processing products. This position will take the product from concept to design to validation and ultimately through production release. Develop product concepts and architectures in concert with external and internal customers, marketing, and process engineering. Survey existing technologies in ADI and reuse designs/architectures as appropriate. Work with MEMS designers to parameterize new sensing structures for purposes of simulation and design verification. Develop and execute design validation plans including debug and customer sampling; includes bench/lab level testing and analysis. BS/MS/PhD EE/Computer Engineering and 5+ years experience required. Mixed signal IC design experience in BiCMOS and CMOS technologies using Cadence, ADICE, Verilog and Synopsys tools for design, verification, synthesis, static timing analysis, and test vector generation.

Lead team member in creating, managing and executing the project plans and day to day activities for the integration of company technology into customer's leading edge CMOS processes. Main interface with customer's integration team with ability to spend onsite time, as necessary, to drive and execute project to schedule; participate/lead in analysis and problem solving; interface with customer engineers and management to maximize speed of technology insertion, first prototype circuit prove out and qualification. Responsible for overall customer activities in process integration, device optimization and meeting customer specifications in a high volume, leading edge (45/65nm) CMOS technology. Experienced with process development or process transfers, front end integration, device physics, process qualification, yield enhancement and high volume fab ramps necessary. Technical and project management interactions with both customer and subcontractors as required.
MSEE, MS Physics or PhD, 10-15 years experience required.

Aid in the development and evaluation of new products for a global hall effect sensor market. Responsibilities include developing, debugging and documenting complex test software and hardware, as well as implementing new test methods to establish product performance and enhance testability. Act as central resource for design, process, manufacturing, test, quality and marketing as products move through development cycle. Requires BSEE and a minimum of 2 years related experience. Working knowledge of analog / digital circuit design, test equipment use, C programming and ATE interface.

Responsible for handling individual projects and supervising others in a multi-tasking environment. BS with 8-12 years or MS +6 years of relevant experience. Must be familiar with Teradyne (A5XXX) or Agilent (93K). Proven experience in a supervisory role with a minimum of 2-3 years managing direct reports. Familiarity with wireless and/or SATA device testing. Candidate must possess excellent oral and written communications skills and great at multi tasking.

Develop production test hardware and software for Mixed Signal IC's used in satellite, cable and terrestrial broadcasts. Support design, system and product engineer and new product characterization. Requires: BSEE with 5 years experience in the field of test engineer. Ability to understand Digital and Analog circuits. Skills in C/C++ for UNIX systems. General knowledge of PC applications. General knowledge of test equipment such as multimeter, oscilloscope, function generator, logic analyzer, etc. ATE experience on Teradyne Catalyst. Experience with Mentor DFT tools. Experience with ORCAD.

Be responsible for implementation of test solutions for analog and mixed signal ASIC devices involving digital, analog, memory, and RF cores. Create test specifications and implement test solutions including DIB/Probe cards/fixture design. Coordinate test efforts between design and manufacturing teams, ASIC suppliers design and test teams, and other test engineers. Provide project technical leadership, mentoring, and development of test engineers within the group. Occasional travel to California, Boston, and other Supplier sites(5%) Requires a BSEE or equivalent, MSEE desired. 7+ years of semiconductor industry, semiconductor device characterization, and test experience. Excellent verbal and written English communication skills required. Teradyne Image software and A500 series, Catalyst or Tiger ATE experience.

The Test Development Engineer will develop test and wafer prove applications for production testing of High Speed ADC and integrated mixed signal chips for the HSC ADC product line. Develop hardware, software and digital test patterns for high performance analog and/or mixed signal ATE, such as the CTS-53xx testers. Additionally, support device characterization, yield improvement and cost reduction efforts. Requirements: BSEE, MSEE preferred. 5+ years of experience in developing test for high speed, high performance analog ICs. Experience on relevant analog/mixed signal ATE is a plus.

Responsible for the development and implementation of new Trim & Probe processes and development of new capabilities to decrease manufacturing costs. The candidate is required to demonstrate good analysis skills, knowledge of C language programming, and test software development skills. Above average written and oral communication skills are also required. The position requires interface with Equipment Vendors and Manufacturing Trim Equipment engineers. The individual will work in the team environment and lead development activities concerning Product platform transfers.

Requirements: Bachelor's Degree in Electrical engineering or Computer science and at least two years' experience with ATE Equipment. Knowledge of SPC and Process control planning. Some Laser system and Wafer handling experience desired.

Responsible for planning, prioritizing and managing the implementation and release of production test solutions for high volume manufacturing of radio frequency integrated circuits. Candidate is expected to lead the design and development test procedures and selection of the test equipment. Participate in planning meetings and estimates of development and test time requirements for new products, lead the production test solution architecture and test plans, and manage the group to ensure the test solution will support cost effective, high volume production.
BS desired, MS preferred in Electrical Engineering. Minimum of 5 years experience. MUST HAVE RF and RFIC experience. Must have high volume production test development experience. Experience with: Rack and Stact systems including VXI, Roos ATE; Teradyne Catalyst ATE, Fusion CX ATE and Trillium ATE.

Provide leadership on business strategies, growth and daily operations in manufacturing environment. Candidate will manage Test and Assembly both on and offshore. Responsibilities: Plan, organize, direct, control and evaluate the operations of manufacturing environment. Developing and implementing product supply strategies for the assembly and test areas. Lead, implement and oversee continuous improvement programs. Establish team objectives and provide leadership to ensure execution of operations for on time delivery, order lead time, capital management and safety. Manage all assembly and test operations to delivery quality products on time at a competitive cost. Bachelors or Masters Degree in Engineering or Business. 7 - 10 years experience in semiconductor manufacturing environment. Test and assembly experience in manufacturing environment. Solid understanding of ISO 9000 requirements. Proficient computer skills including Microsoft Office and ERP software.

Own projects related to new product development and introduction into manufacturing (NPI). Take ownership of multiple new LED products and guide them through NPI process. Manage projects related to new product development where process and equipment projects are necessary to facilitate product introduction into manufacturing. Conduct optical and electrical testing of optoelectronic devices. Execute design and process FMEAs and maintain other documentation within the context of NPI. BS/MS/PhD in Materials Science, Electrical Engineering or other semiconductor related discipline (advanced degree preferred). 5+ years of related experience in product/process development engineering. Knowledge of optical and electrical testing of LEDs. Extensive computer skills required - must have experience with databases and data analysis tools (SQL, Access, SAS JMP, Excel)

8+ years experience Layout/Mask Design for bipolar and CMOS analog ICs as well as digital CMOS ICs. Must be proficient with the Cadence Virtuoso suite of tools. Must have a good understanding of fundamental circuit design and theory. Must have strong schematic to layout translation skills. Must have proven abilities in using CAD tools for various IC design tasks including AP&R (VirtuosoXL and/or Silicon Ensemble) as well as layout verification (DRC, LVS, ERC). Must have solid understanding or experience in schematic capture tools.. Must understand A/D and D/A converter designs. AS degree required; BS preferred.

Responsible for completing the physical design of wireless ICs in a timely manner meeting specific design requirements with minimal assistance. Responsible for taking the physical design from schematic through layout verification and Tape-out. Experience with layout of GaAs pHEMT, MESFET or HBT designs is required. Experience with Cadence Virtuoso/XL & Composer (Opus), parasitic extraction and layout verification (Dracula or Calibre) including DRC, LVS, ERC is also required. Must have a solid understanding of RF layout techniques and be able to work at the cell, block and chip level. Additional responsibilities and qualifications include: Layout of GaAs pHEMT, MESFET or HBT integrated circuit (IC) components from schematics, diagrams or netlists utilizing commercial/Internal proprietary GaAs technologies in accordance with design rules. Directly interfacing with the IC design engineers to produce and optimize layouts for size and performance. Establish and meet project objectives and milestones. A solid understanding of III-V semiconductor manufacturing is a plus. Experience with Si layout and processes a plus. AS/BS degree with a minimum of 3+ years of relevant experience is preferred.

Maintains current status of customer requirements for existing and future product roadmaps. Responsible for market research on serial communications interfaces such as UART, I2C, SPI, USB and PCI-Express. Will develop business cases and proposals for the identification and development of new market and product opportunities consistent with product line objectives. BSEE with 8-12 years experience or MSEE with 5-18 years of experience. Strategic marketing experience and/or MBA is desired. Working knowledge of Intel and/or Motorola processor system design. Direct customer experience in serial communications designs for peripheral, telecommunications and/or industrial applications is required.

Consumer Audio. Responsible for driving the strategy, roadmap, and customer engagements associated with company's expansion of its audio offering from PCs to the broader consumer markets. The position will be responsible for driving a 3 year strategy on how company will win in the targeted market segments with our technology. The person must work with other resources such as design, applications, and sales to determine the strategy, products, and ecosystem that will enable rapid growth of audio in non-PC applications. The role reports directly to the GM of the audio division; it is anticipated that the person will build an appropriate marketing team as the company engages the marketplace. Bachelor or better in a technical field, especially electrical engineering. Direct experience in the consumer audio market, including familiarity with codec and digital amplifier markets. Track record of building a strategy and rapidly growing market share. Candidate is expected to have >10 years experience in the semiconductor market, and especially in the marketing, application, and or sales of audio components.

Responsible for providing technical support to Field Applications Engineers and Business Unit Directors, including the development of application notes and reference designs. You will also work with customers and third parties to specify and deliver solutions. Provide demo and application development/support and develop market requirement lists, product specifications and technical training plans. Successful candidate will possess a BS degree in a related engineering discipline and a minimum of 5 years of directly related experience. Successful candidate will also possess strong interpersonal and communications skills. Knowledge of analog product is essential.

Responsible for developing, managing and sustaining subcontracted assembly for packaged RF power products while achieving high yields at the lowest possible cost. Will work with the semiconductor fabrication, device design and applications engineering functions to support overall product development roadmap. Develop packaging concepts; Evaluate, select and manage contract manufacturers that provide packaging services for the company. Work with packaging suppliers and internal groups to reduce cycle time and drive down component costs by modifying the designs; Formalize assembly, packaging and test specifications for in house applications and procurement purposes. Perform simulation, modeling and analysis used in assembling a GaN device in plastic or ceramic packaging. BS Degree in Engineering, Physics or related technical field. Minimum of 5 years of experience in semiconductor packaging.

Responsible for defining next generation package solutions and leading implementation efforts in that direction. Work across Product Lines and interface with customers to understand critical application needs, as well as business constraints. Create a set of objective technical specifications, which should include package footprint, package reliability and package thermal/electrical requirements. Background in packaging should include the following: Package applications; Strong understanding of both conventional packages (MLP, TSSOP) and advanced packages (SIP, CSP). Familiar with tools used in package design, thermal and electrical modeling. Minimum of 7-10 years packaging experience - BSME, BS Materials Science or BSEE. 20-25% travel internationally and domestically.

Define specifications for Power Management VR (Voltage Regulator) for PC motherboards. Establish characterization methods for compliance with Intel/AMD VR specifications. Define and design CRBs including selections of Power MOSFET, Buck converter components in compliance with Intel/AMB specifications. Write application notes including software tools for component selection and efficiency trade offs. Help customers to design and debug their products so they enter production phase quicker. BSEE/MSEE with at least 5 years experience as Applications Engineer for Power Management in PC/servers motherboards. Solid understanding of Pulse Width Modulation Buck converter design; theory and trade-offs specifically for PC applications where High Power, efficiency and fast transient response to important. Solid understanding VRD/VRM design techniques. Good people skills, communication skills and proactive. Expert skills in presentations and PowerPoint. Very good written and verbal communication skills are essential.

Part of a team responsible for testing a broad range of nitride LED products in high volumes. Responsible for ownership of wafer probes and test equipment, as well as other engineering support functions. Responsibilities - process improvement and development through carefully designed experimentation and implementation of process control and monitoring techniques. Yield improvement through identification and elimination of yield limiters. Insure complete process documentation and QS9000 compliance. BS in Mechanical, Chemical, Materials Science or Electrical Engineering of 5 years wafer probe experience. Experience with SPC and experimental design. Knowledge of and experience with MS Access and Excel.

Company designs and manufactures high power diodes lasers for industrial, defense and telecommunication markets. Engineer is responsible for driving yield and reliability improvement in a laser diode manufacturing facility. He/she will work with manufacturing team to identify root causes of yield loss and work on programs to eliminate these causes. Engineer will direct failure analysis activities on customer returns and drive corrective actions to prevent recurrence. Engineer is expected to be very comfortable with process and equipment details since he/she will have to perform DOE characterizations to optimize our process performance. Engineer will eventually lead an effort to enable company to achieve ISO9000 certification. B.S. Electrical Engineering, Physics or equivalent; advanced degree is a plus; 7+ years experience in semiconductor fabrication; Basic understanding of semiconductor diode laser devices and packages; Knowledge of wafer fabrication and chip assembly unit operations; Basic FA analytical skills deprocessing, SEM, FIB, EDX; Has done some Design of Experiments work and statistical data analysis; Familiar with SPC, FMEA, Control Plans and other Quality System tools.

Responsible for leading teams of engineers to resolve yield related scrap, and throughput improvements. Position will interface with other functional group leaders to resolve cross-departmental yield related issues. Incumbent must have extensive photo process and equipment knowledge for recommendations for tooling and process requirements. Candidates will possess the following: BS Degree (MS preferred) in Engineering; 10+ years of related experience. In-depth experience with photolithography tools, preferably ASML scanners. Strong project management skills demonstrated ability to understand systems, identify process innovation opportunities and define necessary improvements, manage change and lead cross functional teams to implement solutions.

Responsible for managing external foundry relationships, developing and manufacturing metrics, and manufacturing troubleshooting in analog mixed/signal and power IC technologies. You will work with design teams to enable products into manufacturing; communicate requirements to foundry and ensure compliance. Lead yield improvement with process/device/product optimization. Monitor production ensuring that high quality is maintained, on-going process improvements are identified and delivery commitments are met. Work with foundry to develop and implement cost reduction strategies. Resolve on-going device related issues with foundry in coordination with business unit; monitor process/device technology development. The successful candidate will possess a Bachelor's degree with an emphasis on device physics and design related course work and minimum of five years experience in dealing with semiconductor foundries on a day-to-day basis. You must also have the following: Experience with foundry technology files such as Spice models and DRC decks, PDK, ASIC design flow, and production flow issues. Good understanding of CMOS process/technology. Bipolar and BCD knowledge is preferred. Ability to relate PCM (Process Control Monitor) data, wafer-sort and yield data to help identify product tolerances and yield sensitivities. Good data analysis skills using large databases of test and fab data. Good understanding of statistics, DOE methodology, SPC, and key semiconductor manufacturing tools. Six Sigma Green / Black Belt is a plus.

Responsible for multiple tasks in RTL-2-GDS flow including synthesis, STA, floorplanning, APR, IR drop/EM analysis, physical verification and formal verification of high performance, low noise, mixed signal audio designs. Responsible for developing and maintaining Mixed-Signal IC design flows. Responsible for working with other sites to ensure consistency of flows and tools. BSEE/MSEE with 5+ yrs experience and involvement in multiple tapeouts. Experience with one or multiple tasks in RTL-2-GDS flow including synthesis, STA, floorplanning, APR, IR drop/EM analysis, physical verification and formal verification. Ability to work with minimal supervision and ability to support design staff required. Experience with Synopsys, Magma and/or Cadence APR flows required. Understanding of Mixed-Signal IC flows and issues a plus.

Responsible for process development, characterization and release to production a wafer thinning process. Once released, position will be responsible for sustaining the process and addressing yield and manufacturability problems for continuous improvement. Work with the Process Development group to develop a wafer thinning process for MEMS manufacturing. Work with other Process Engineers and the Yield organization to identify and diagnose yield and manufacturability problems.
4 - 6 years of experience in Wafer Fab Process Engineering. Experience with wafer thinning, grinding and polishing preferred.
BS / MS in Materials Science, Electrical Engineer, Chemical Engineering or equivalent.

Provide engineering sustaining support for Capping area including day to day support of new equipment startup and capping process development. Provide line support (sustaining) for Capping area lot disposition, training and defect reducing efforts. Support the developments, evaluation and transfer into manufacturing of new products and processes. Support evaluation and acceptance of additional equipment. Maintain Capping area at QS9000 and ISO9000 levels. Perform experiments including data analysis using statistical methods.
BS/MS in Materials Science, Chemical Engineering or other equivalent. 3+ years engineering experience, preferably in a wafer fab sustaining capacity. Knowledge of DOE, SPC and semiconductor fundamentals.

Lead Engineering efforts in the optimization of solar cell yields and efficiencies. Communicate verbally or in writing any change that affects the build process of the product. Work as part of the Science and Engineering team to identify, bring into production and optimize new cells. Establish statistical process control in the cell fabrication processes. Utilize Lean and six sigma tools to optimize manufacturing processes related to yield and cell efficiency. Provide expertise in working with wet etch processes; physical vapor deposition (PVD); Chemical Vapor Deposition (CVD); plasma enhanced CVD (PECVD); silicon nitride deposition, metal semiconductor contact formation, conductive pastes and the equipment used to accomplish these. Provide analytical problem solving solutions to manufacturing developments.
BSEE plus 5 years experience.

Responsible for leading teams of engineers to resolve yield issues. Must have extensive process and defect knowledge. Must have experience with defect reduction projects and data mining. Interface with all process groups to resolve yield and/or defect related issues. BS degree in Engineering, 6+ years experience. In-depth experience with brightfield and darkfield wafer inspection tools.

MS or PhD in Physics / Chemical Engineering / Material Science with 5-10 years plasma etch experience developing advanced front end (Isolation, Gate Poly, Spacer) and back end etches (Contact, Metal, Via, Passivation) on 0.18 um generation experience technology or below. Must have worked in a volume manufacturing fab (>3-5 outs per month at least). Thorough knowledge of DoE and SPC is a must. Also familiar with LAM 960 Equipment.

Working in a sub-micron photolithography area in a sustaining capacity. Responsibilities include monitoring and maintaining process throughput, improving yields and cycle time, and troubleshoot and/or assist with downtime equipment problems. Familiarity with PROMIS lot tracking software a plus. BS Engineering or Chemistry required. 2 year minimum experience in semiconductor fabrication with background in photolithography would be preferable. Familiarity with Nikon and Ultratech steppers, and TEL track would be beneficial. This is a continuous operations night shift position. The night shift starts at 6:30 pm and alternates between four 10-hour weeknight shifts and three 12-hour weekend shifts.

Senior level position with experience developing photo processes for the UT 1500 Stepper, as well as contact aligner. The topologies are varied - would not be the usual planar photo processing requirement for semiconductors. Etch background is a plus - extensive photo experience essential. Company is a MEMS based company.

At least 5 years work experience in the semiconductor industry - MS Degree Required. PhD Preferred. Will work on AMAT P5000 and AMAT Centura tools to develop and maintain processes for Tungsten deposition, doped and undoped glass.

Responsible for maintaining equipment in one or more of the following wafer fab areas: Ion Implant, Epi, Diffusion, Photo, Thin Films. Responsible for performing electrical and mechanical troubleshooting to determine problems in non-functioning production equipment used in the semiconductor wafer fab process. Responsible for repair and maintenance of equipment using specifications, repair manuals and schematics. In addition, you will use test and diagnostic equipment to perform checkouts and rebuild manufacturing equipment.

VARIOUS SHIFTS / VARIOUS LOCATIONS
Candidate will possess an Associates degree in electronic technology. Experience in photolithography equipment required.

Serve as a key member of optoelectronic development team. Develop inspection recipes and protocols for new LED products. Manage projects related to new product development where new inspection processes, methods and/or equipment are required. Define/refine methods to increase process repeatability and control to achieve higher yield, lower costs, higher flexibility and/or lower variation. Develop and execute product/equipment/process qualification plans related to automated visual inspection. Own projects related to automated visual inspection or newly developed products. Significant automated visual inspection experience required. BS/MS/PhD in Materials Science, Electrical Engineering or other semiconductor related discipline (advanced degree preferred). 2+ years of experience with automated visual inspection of electronic products. Extensive computer skills required.

Responsible for developing, applying, revising and maintaining quality standards for processing materials into partially finished or finished products. You will also design and implement methods and procedures for inspecting, testing and evaluating the precision and accuracy of products and/or production equipment. You will analyze reports and returned products and recommend corrective action; prepare documentation for inspection/testing; review technical documentation for hardware and software compliance; analyze customer field returns; perform detailed component level testing of hall effect sensor devices. Primary focus will be on product qualification and test validation. BSEE (or related field) or equivalent experience and a minimum of two years of experience in inspection methods used in the design, fabrication, production of semiconductor devices and testing of electrical / electronics products. Working knowledge of analog / digital circuit design, semiconductor physics and C programming language. Working knowledge of statistical analysis methods is also required.

Responsible for providing Audit Management support for Internal, Customer, ISO 9000 / 14000 and Automotive TS 16949 audits. This includes implementation of corrective actions and/or 8D reports. Driving improvements in Statistical Process Control meetings for both in-line and Parametric Test. Implementing Customer Quality Improvements including driving Fab Defect Reductions, Customer returns Trends (random and systemic), Fab related corrective actions (8D) and Support FIeld CQE's. Implementing Nonconforming Material Management including Maverick material reduction. Qualified applications should have: Bachelors Degree in Electrical / Electronic Engineering or other related technical fields. Familiar with Quality Assurance. Strong communication (both verbal and written) and interpersonal skills.

Familiar with the use of failure analysis equipment and techniques i.e. SEM, EDX, Photoemission, FIB, Thermal Imaging, Auger Analysis, CSAM, Plasma Etching, Curve Tracer and other advanced techniques use in the Failure Analysis field. Able to understand device layout and circuit diagrams. Able to use chemicals and follow safe practices in performing destructive physical analysis of devices. Monitor and schedule workload of failure analysis and summarize FA data for quarterly reliability report. Developed advanced FA techniques.
BS in Engineering or Science related discipline or equivalent, 8-10 years experience in failure analysis field on semiconductor devices. Ability to understand electrical characteristics of transistors/FETs, IGBT, Diodes and IC's.

The tool set experience we are looking for includes Lam A6, 4520, 9400, 4420 Rainbow, and 4520 Rainbow tools. On those tool sets, you will be responsible for generating cost savings, improved tool availability and overall quality performance; analysis of expenses to identify ways to reduce cost while maintaining high quality standards; coordinating with production and process engineering to create programs that meet high quality, availability, and safety performance; working independently and making technical decisions based on a careful balance of risk, cost and benefit; developing and implementing innovative solutions; acting as tool owner to understand and permanently resolve key tool issues. You will track and complete associated action plans; performing pareto analysis on failures by tool set looking for commonalties, patterns, and failure mechanisms; initiating discussions with other Equipment engineers to mentor them and encourage best in class performance among peers; uncovering new suppliers or new cleaning/repair methods; Training and mentoring technicians in PM performance, quality, and troubleshooting.
Education Requirements or Equivalency: A Bachelor's Degree in engineering or other related technical disciplines along with 8 years semiconductor equipment engineering experience is preferred. Candidates with an equivalency of Lam specific hands on engineering experience will also be evaluated. Ability to work comfortably while supporting all safety, PPE, and cleanroom protocol procedures. Responsible for performing advanced electrical and mechanical troubleshooting on a wide variety of Etch manufacturing equipment, but specific knowledge of Lam tools is required.

Repair and Maintenance of AMAT P5000 Etch and Deposit cluster tools. Perform vacuum, electronics, mechanical process and pneumatic troubleshooting on other semiconductor equipment. The ability to locate and diagnose failures using standard electronic equipment, detailed drawings, diagrams, specifications, manuals, and/or instructions is required. Meet all safety requirements. Ability to effectively communicate orally and in writing through procedures. May perform other duties as determined by manager. Previous experience in electronic/mechanical troubleshooting of AMAT P5000 is absolutely required. Must be a team player.